From axp-kernel-list-request@redhat.com Wed Nov 25 22:48:57 1998 Received: from adler.unix-ag.uni-siegen.de (root@adler.unix-ag.uni-siegen.de [141.99.42.52]) by vmax.unix-ag.uni-siegen.de (Spoolhost) with ESMTP id WAA22142 for ; Wed, 25 Nov 1998 22:48:56 +0100 Received: from lists.redhat.com (lists.redhat.com [199.183.24.247]) by adler.unix-ag.uni-siegen.de (Mailhost) with SMTP id WAA30564 for ; Wed, 25 Nov 1998 22:48:52 +0100 Received: (qmail 22607 invoked by uid 501); 25 Nov 1998 21:48:28 -0000 Resent-Date: 25 Nov 1998 21:48:28 -0000 Resent-Cc: recipient list not shown: ; MBOX-Line: From axp-kernel-list-request@redhat.com Wed Nov 25 16:48:28 1998 Message-Id: <199811252148.QAA01538@linux03.hlo.dec.com> To: torvalds@transmeta.com Cc: axp-kernel-list@redhat.com From: Jay.Estabrook@digital.com Subject: Alpha-related patches for 2.1.129 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 25 Nov 1998 16:48:59 +0500 Sender: jestabro@amt.tay1.dec.com Resent-Message-ID: <"xAUCv.0.2X5.ii7Ns"@lists.redhat.com> Resent-From: axp-kernel-list@redhat.com Reply-To: axp-kernel-list@redhat.com X-Mailing-List: archive/latest/5 X-Loop: axp-kernel-list@redhat.com Precedence: list Resent-Sender: axp-kernel-list-request@redhat.com X-URL: http://www.redhat.com Status: RO Linus, Please find attached a (relatively :-) small set of patches against 2.1.129 that solve a number of existing problems, along with adding in some new EV6 platform support and some enhancements/changes to existing support. I hope you can find a way to squeeze them into 2.1.130 or soon thereafter. If you need more details about what's involved, please let me know. Hope you have a Happy Thanksgiving! --Jay++ ----------------------------------------------------------------------------- American Non Sequitur Society: we don't make sense, but we do like pizza... Jay A Estabrook Alpha Motherboards - LINUX Project Compaq Computer Corp. (508) 841-3241 or (DTN) 237-3241 334 South St, Shrewsbury, MA 01545 Jay.Estabrook@digital.com ----------------------------------------------------------------------------- diff -urP old/arch/alpha/kernel/bios32.c new/arch/alpha/kernel/bios32.c --- old/arch/alpha/kernel/bios32.c Mon Oct 12 14:40:12 1998 +++ new/arch/alpha/kernel/bios32.c Tue Nov 3 22:53:06 1998 @@ -719,39 +719,55 @@ pcibios_write_config_dword(bridge->bus->number, bridge->devfn, PCI_IO_BASE, l); - /* Also clear out the upper 16 bits. */ + /* + * Also: + * clear out the upper 16 bits of IO base/limit. + * clear out the upper 32 bits of PREF base/limit. + */ pcibios_write_config_dword(bridge->bus->number, bridge->devfn, PCI_IO_BASE_UPPER16, 0); + pcibios_write_config_dword(bridge->bus->number, bridge->devfn, + PCI_PREF_BASE_UPPER32, 0); + pcibios_write_config_dword(bridge->bus->number, bridge->devfn, + PCI_PREF_LIMIT_UPPER32, 0); /* - * Set up the top and bottom of the PCI Memory segment + * Set up the top and bottom of the PCI Memory segment * for this bus. */ l = ((bmem & 0xfff00000) >> 16) | ((tmem - 1) & 0xfff00000); pcibios_write_config_dword(bridge->bus->number, bridge->devfn, PCI_MEMORY_BASE, l); /* - * Turn off downstream PF memory address range: + * Turn off downstream PF memory address range, unless + * there is a VGA behind this bridge, in which case, we + * enable the PREFETCH range to include BIOS ROM at C0000. + * + * NOTE: this is a bit of a hack, done with PREFETCH for + * simplicity, rather than having to add it into the above + * non-PREFETCH range, which could then be bigger than we want. + * We might assume that we could relocate the BIOS ROM, but + * that would depend on having it found by those who need it + * (the DEC BIOS emulator would find it, but I do not know + * about the Xservers). So, we do it this way for now... ;-} */ + l = (found_vga) ? 0 : 0x0000ffff; pcibios_write_config_dword(bridge->bus->number, bridge->devfn, - PCI_PREF_MEMORY_BASE, 0x0000ffff); + PCI_PREF_MEMORY_BASE, l); /* * Tell bridge that there is an ISA bus in the system, * and (possibly) a VGA as well. */ - /* ??? This appears to be a single-byte write into MIN_GNT. - What is up with this? */ - l = 0x00040000; /* ISA present */ - if (found_vga) l |= 0x00080000; /* VGA present */ - pcibios_write_config_dword(bridge->bus->number, bridge->devfn, - 0x3c, l); + l = (found_vga) ? 0x0c : 0x04; + pcibios_write_config_byte(bridge->bus->number, bridge->devfn, + PCI_BRIDGE_CONTROL, l); /* - * Clear status bits, enable I/O (for downstream I/O), - * turn on master enable (for upstream I/O), turn on - * memory enable (for downstream memory), turn on - * master enable (for upstream memory and I/O). + * Clear status bits, + * turn on I/O enable (for downstream I/O), + * turn on memory enable (for downstream memory), + * turn on master enable (for upstream memory and I/O). */ pcibios_write_config_dword(bridge->bus->number, bridge->devfn, PCI_COMMAND, 0xffff0007); @@ -806,12 +822,15 @@ enable_ide(long ide_base) { int data; + unsigned long flags; + __save_and_cli(flags); outb(0, ide_base); /* set the index register for reg #0 */ data = inb(ide_base+1); /* read the current contents */ outb(0, ide_base); /* set the index register for reg #0 */ outb(data | 0x40, ide_base+1); /* turn on IDE */ outb(data | 0x40, ide_base+1); /* turn on IDE, really! */ + __restore_flags(flags); } /* Look for mis-configured devices' I/O space addresses behind bridges. */ diff -urP old/arch/alpha/kernel/setup.c new/arch/alpha/kernel/setup.c --- old/arch/alpha/kernel/setup.c Mon Oct 12 14:40:12 1998 +++ new/arch/alpha/kernel/setup.c Tue Nov 3 22:54:15 1998 @@ -351,6 +351,12 @@ }; static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4}; +static char tsunami_names[][16] = { + "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper", + "Goldrush", "Webbrick", "Catamaran" +}; +static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8}; + static struct alpha_machine_vector * __init get_sysvec(long type, long variation, long cpu) @@ -600,6 +606,10 @@ if (member < N(rawhide_indices)) *variation_name = rawhide_names[rawhide_indices[member]]; break; + case ST_DEC_TSUNAMI: + if (member < N(tsunami_indices)) + *variation_name = tsunami_names[tsunami_indices[member]]; + break; } } @@ -651,8 +661,8 @@ } unaligned[2]; static char cpu_names[][8] = { - "EV3", "EV4", "Unknown", "LCA4", "EV5", "EV45", "EV56", - "EV6", "PCA56", "PCA57" + "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56", + "EV6", "PCA56", "PCA57", "EV67" }; struct percpu_struct *cpu; diff -urP old/arch/alpha/kernel/smc37c669.c new/arch/alpha/kernel/smc37c669.c --- old/arch/alpha/kernel/smc37c669.c Fri Sep 4 15:10:46 1998 +++ new/arch/alpha/kernel/smc37c669.c Tue Nov 3 22:55:33 1998 @@ -2519,10 +2519,10 @@ void __init SMC669_Init ( void ) { SMC37c669_CONFIG_REGS *SMC_base; + unsigned long flags; + __save_and_cli(flags); if ( ( SMC_base = SMC37c669_detect( ) ) != NULL ) { - printk( "SMC37c669 Super I/O Controller found @ 0x%lx\n", - (unsigned long) SMC_base ); #if SMC_DEBUG SMC37c669_config_mode( TRUE ); SMC37c669_dump_registers( ); @@ -2573,8 +2573,12 @@ SMC37c669_config_mode( FALSE ); SMC37c669_display_device_info( ); #endif + __restore_flags(flags); + printk( "SMC37c669 Super I/O Controller found @ 0x%lx\n", + (unsigned long) SMC_base ); } else { + __restore_flags(flags); #if SMC_DEBUG printk( "No SMC37c669 Super I/O Controller found\n" ); #endif diff -urP old/arch/alpha/kernel/smc37c93x.c new/arch/alpha/kernel/smc37c93x.c --- old/arch/alpha/kernel/smc37c93x.c Mon Oct 12 14:40:12 1998 +++ new/arch/alpha/kernel/smc37c93x.c Tue Nov 3 22:56:09 1998 @@ -241,10 +241,10 @@ int __init SMC93x_Init(void) { unsigned long SMCUltraBase; + unsigned long flags; + __save_and_cli(flags); if ((SMCUltraBase = SMCDetectUltraIO()) != 0UL) { - printk("SMC FDC37C93X Ultra I/O Controller found @ 0x%lx\n", - SMCUltraBase); #if SMC_DEBUG SMCReportDeviceStatus(SMCUltraBase); #endif @@ -264,9 +264,13 @@ SMCReportDeviceStatus(SMCUltraBase); #endif SMCRunState(SMCUltraBase); + __restore_flags(flags); + printk("SMC FDC37C93X Ultra I/O Controller found @ 0x%lx\n", + SMCUltraBase); return 1; } else { + __restore_flags(flags); DBG_DEVS(("No SMC FDC37C93X Ultra I/O Controller found\n")); return 0; } diff -urP old/arch/alpha/kernel/sys_dp264.c new/arch/alpha/kernel/sys_dp264.c --- old/arch/alpha/kernel/sys_dp264.c Sun Sep 6 13:34:33 1998 +++ new/arch/alpha/kernel/sys_dp264.c Tue Nov 3 22:59:28 1998 @@ -25,12 +25,24 @@ #include #include #include +#include #include "proto.h" #include "irq.h" #include "bios32.h" #include "machvec.h" +struct hwrpb_struct *hwrpb; + +/* hwrpb->sys_variation helpers */ +#define MEMBER_ID(x) (((x)>>10)&0x3f) + +#define DP264_ID 1 +#define MONET_ID 4 +#define GOLDRUSH_ID 6 +#define WEBBRICK_ID 7 + +#define dev2hose(d) (bus2hose[(d)->bus->number]->pci_hose_index) /* * HACK ALERT! only CPU#0 is used currently @@ -217,16 +229,94 @@ }; const long min_idsel = 5, max_idsel = 10, irqs_per_slot = 5; int irq = COMMON_TABLE_LOOKUP; + if (irq >= 0) - irq += 16 * bus2hose[dev->bus->number]->pci_hose_index; + irq += 16 * dev2hose(dev); + return irq; } +static int __init +monet_map_irq(struct pci_dev *dev, int slot, int pin) +{ + static char irq_tab[13][5] __initlocaldata = { + /*INT INTA INTB INTC INTD */ + { 45, 45, 45, 45, 45}, /* IdSel 3 21143 PCI1 */ + { -1, -1, -1, -1, -1}, /* IdSel 4 unused */ + { -1, -1, -1, -1, -1}, /* IdSel 5 unused */ + { 47, 47, 47, 47, 47}, /* IdSel 6 SCSI PCI1 */ + { -1, -1, -1, -1, -1}, /* IdSel 7 ISA Bridge */ + { -1, -1, -1, -1, -1}, /* IdSel 8 P2P PCI1 */ +#if 1 + { 28, 28, 29, 30, 31}, /* IdSel 14 slot 4 PCI2*/ + { 24, 24, 25, 26, 27}, /* IdSel 15 slot 5 PCI2*/ +#else + { -1, -1, -1, -1, -1}, /* IdSel 9 unused */ + { -1, -1, -1, -1, -1}, /* IdSel 10 unused */ +#endif + { 40, 40, 41, 42, 43}, /* IdSel 11 slot 1 PCI0*/ + { 36, 36, 37, 38, 39}, /* IdSel 12 slot 2 PCI0*/ + { 32, 32, 33, 34, 35}, /* IdSel 13 slot 3 PCI0*/ + { 28, 28, 29, 30, 31}, /* IdSel 14 slot 4 PCI2*/ + { 24, 24, 25, 26, 27} /* IdSel 15 slot 5 PCI2*/ +}; + const long min_idsel = 3, max_idsel = 15, irqs_per_slot = 5; + int irq = COMMON_TABLE_LOOKUP; + + return irq; +} + +static int __init +monet_swizzle(struct pci_dev *dev, int *pinp) +{ + int slot, pin = *pinp; + + /* Check first for the built-in bridge on hose 1. */ + if (dev2hose(dev) == 1 && PCI_SLOT(dev->bus->self->devfn) == 8) { + slot = PCI_SLOT(dev->devfn); + } + else + { + /* Must be a card-based bridge. */ + do { + /* Check for built-in bridge on hose 1. */ + if (dev2hose(dev) == 1 && + PCI_SLOT(dev->bus->self->devfn) == 8) { + slot = PCI_SLOT(dev->devfn); + break; + } + pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)) ; + + /* Move up the chain of bridges. */ + dev = dev->bus->self; + /* Slot of the next bridge. */ + slot = PCI_SLOT(dev->devfn); + } while (dev->bus->self); + } + *pinp = pin; + return slot; +} + static void __init dp264_pci_fixup(void) { layout_all_busses(DEFAULT_IO_BASE, DEFAULT_MEM_BASE); - common_pci_fixup(dp264_map_irq, common_swizzle); + + /* must do map and/or swizzle different on some */ + switch (MEMBER_ID(hwrpb->sys_variation)) { + case MONET_ID: + common_pci_fixup(monet_map_irq, monet_swizzle); + /* es1888_init(); */ /* later? */ + break; + + case DP264_ID: + case GOLDRUSH_ID: + case WEBBRICK_ID: + default: + common_pci_fixup(dp264_map_irq, common_swizzle); + break; + } /* end MEMBER_ID switch */ + SMC669_Init(); } diff -urP old/arch/alpha/kernel/sys_miata.c new/arch/alpha/kernel/sys_miata.c --- old/arch/alpha/kernel/sys_miata.c Sun Sep 6 13:34:33 1998 +++ new/arch/alpha/kernel/sys_miata.c Tue Nov 3 23:00:52 1998 @@ -36,7 +36,7 @@ if (irq >= 16) { /* Make CERTAIN none of the bogus ints get enabled... */ *(vulp)PYXIS_INT_MASK = - ~((long)mask >> 16) & ~0x4000000000000e3bUL; + ~((long)mask >> 16) & ~0x400000000000063bUL; mb(); /* ... and read it back to make sure it got written. */ *(vulp)PYXIS_INT_MASK; @@ -62,7 +62,7 @@ * then all the PCI slots/INTXs (12-31). */ /* Maybe HALT should only be used for SRM console boots? */ - pld &= 0x00000000fffff1c4UL; + pld &= 0x00000000fffff9c4UL; /* * Now for every possible bit set, work through them and call @@ -101,8 +101,8 @@ * used for this purpose, as PIC interrupts are delivered as the * vectors 0x800-0x8f0). * But I really don't want to change the fixup code for allocation - * of IRQs, nor the alpha_irq_mask maintenance stuff, both of which look - * nice and clean now. + * of IRQs, nor the alpha_irq_mask maintenance stuff, both of which + * look nice and clean now. * So, here's this grotty hack... :-( */ if (irq >= 16) @@ -120,14 +120,15 @@ alpha_mv.device_interrupt = miata_srm_device_interrupt; /* Note invert on MASK bits. */ - *(vulp)PYXIS_INT_MASK = ~((long)alpha_irq_mask >> 16); mb(); + *(vulp)PYXIS_INT_MASK = + ~((long)alpha_irq_mask >> 16) & ~0x400000000000063bUL; mb(); #if 0 /* These break on MiataGL so we'll try not to do it at all. */ *(vulp)PYXIS_INT_HILO = 0x000000B2UL; mb(); /* ISA/NMI HI */ *(vulp)PYXIS_RT_COUNT = 0UL; mb(); /* clear count */ #endif /* Clear upper timer. */ - *(vulp)PYXIS_INT_REQ = 0x4000000000000000UL; mb(); + *(vulp)PYXIS_INT_REQ = 0x4000000000000180UL; mb(); enable_irq(16 + 2); /* enable HALT switch - SRM only? */ enable_irq(16 + 6); /* enable timer */ @@ -209,22 +210,21 @@ { -1, -1, -1, -1, -1}, /* IdSel 15, EIDE */ { -1, -1, -1, -1, -1}, /* IdSel 16, none */ { -1, -1, -1, -1, -1}, /* IdSel 17, none */ - /* {16+11, 16+11, 16+11, 16+11, 16+11},*//* IdSel 17, USB ?? */ { -1, -1, -1, -1, -1}, /* IdSel 18, PCI-ISA */ { -1, -1, -1, -1, -1}, /* IdSel 19, PCI-PCI */ { -1, -1, -1, -1, -1}, /* IdSel 20, none */ { -1, -1, -1, -1, -1}, /* IdSel 21, none */ {16+12, 16+12, 16+13, 16+14, 16+15}, /* IdSel 22, slot 4 */ {16+16, 16+16, 16+17, 16+18, 16+19}, /* IdSel 23, slot 5 */ - /* The following are actually on bus 1, which is - across the builtin PCI-PCI bridge. */ - {16+20, 16+20, 16+21, 16+22, 16+23}, /* IdSel 24, slot 1 */ - {16+24, 16+24, 16+25, 16+26, 16+27}, /* IdSel 25, slot 2 */ - {16+28, 16+28, 16+29, 16+30, 16+31}, /* IdSel 26, slot 3 */ + /* the next 7 are actually on PCI bus 1, across the bridge */ + {16+11, 16+11, 16+11, 16+11, 16+11}, /* IdSel 24, QLISP/GL*/ + { -1, -1, -1, -1, -1}, /* IdSel 25, none */ + { -1, -1, -1, -1, -1}, /* IdSel 26, none */ { -1, -1, -1, -1, -1}, /* IdSel 27, none */ - { -1, -1, -1, -1, -1}, /* IdSel 28, none */ - { -1, -1, -1, -1, -1}, /* IdSel 29, none */ - { -1, -1, -1, -1, -1}, /* IdSel 30, none */ + {16+20, 16+20, 16+21, 16+22, 16+23}, /* IdSel 28, slot 1 */ + {16+24, 16+24, 16+25, 16+26, 16+27}, /* IdSel 29, slot 2 */ + {16+28, 16+28, 16+29, 16+30, 16+31}, /* IdSel 30, slot 3 */ + /* this bridge is on the main bus of the later original MIATA */ { -1, -1, -1, -1, -1}, /* IdSel 31, PCI-PCI */ }; const long min_idsel = 3, max_idsel = 20, irqs_per_slot = 5; @@ -239,7 +239,7 @@ /* Check first for the built-in bridge. */ if ((PCI_SLOT(dev->bus->self->devfn) == 8) || (PCI_SLOT(dev->bus->self->devfn) == 20)) { - slot = PCI_SLOT(dev->devfn) + 5; + slot = PCI_SLOT(dev->devfn) + 9; } else { @@ -247,7 +247,7 @@ do { if ((PCI_SLOT(dev->bus->self->devfn) == 8) || (PCI_SLOT(dev->bus->self->devfn) == 20)) { - slot = PCI_SLOT(dev->devfn) + 5; + slot = PCI_SLOT(dev->devfn) + 9; break; } pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); diff -urP old/arch/alpha/kernel/sys_ruffian.c new/arch/alpha/kernel/sys_ruffian.c --- old/arch/alpha/kernel/sys_ruffian.c Mon Oct 12 14:40:12 1998 +++ new/arch/alpha/kernel/sys_ruffian.c Tue Nov 3 23:01:56 1998 @@ -62,7 +62,7 @@ outb(0x20, 0x20); } else { /* Ack PYXIS PCI interrupt. */ - *(vulp)PYXIS_INT_REQ = (1UL << (irq - 16)); + *(vulp)PYXIS_INT_REQ = (1UL << (irq - 16)); mb(); /* ... and read it back to make sure it got written. */ *(vulp)PYXIS_INT_REQ; } @@ -91,8 +91,8 @@ while (pld) { i = ffz(~pld); pld &= pld - 1; /* clear least bit set */ - if (i == 7) { - /* Copy this bit from isa_device_interrupt cause + if (i == 7) { /* if ISA int */ + /* Copy this code from isa_device_interrupt because we need to hook into int 0 for the timer. I refuse to soil device_interrupt with ifdefs. */ @@ -107,13 +107,12 @@ if (j == 7 && !(inb(0x20) & 0x80)) { /* It's only a passive release... */ } else if (j == 0) { - timer_interrupt(0, NULL, regs); + handle_irq(8, -1, regs); /* fake it */ ruffian_ack_irq(0); } else { handle_irq(j, j, regs); } - } else { - /* if not timer int */ + } else { /* if not an ISA int */ handle_irq(16 + i, 16 + i, regs); } @@ -171,6 +170,7 @@ } +#ifdef BUILDING_FOR_MILO /* * The DeskStation Ruffian motherboard firmware does not place * the memory size in the PALimpure area. Therefore, we use @@ -207,6 +207,7 @@ return ret; } +#endif /* BUILDING_FOR_MILO */ static void __init ruffian_init_arch(unsigned long *mem_start, unsigned long *mem_end) @@ -232,10 +233,12 @@ static void ruffian_kill_arch (int mode, char *reboot_cmd) { +#if 0 + /* this only causes re-entry to ARCSBIOS */ /* Perhaps this works for other PYXIS as well? */ *(vuip) PYXIS_RESET = 0x0000dead; mb(); - +#endif generic_kill_arch(mode, reboot_cmd); } diff -urP old/drivers/scsi/qlogicisp.c new/drivers/scsi/qlogicisp.c --- old/drivers/scsi/qlogicisp.c Sun Sep 6 13:34:33 1998 +++ new/drivers/scsi/qlogicisp.c Tue Nov 3 22:24:09 1998 @@ -1107,8 +1107,9 @@ #if RELOAD_FIRMWARE /* Do not reload firmware if 1040B, i.e. revision 5 chip. */ - if (((struct isp1020_hostdata *) host->hostdata)->revision == 5) - printk("qlogicisp : 1040B chip, firmware not (re)loaded\n"); + if (((struct isp1020_hostdata *) host->hostdata)->revision >= 5) + printk("qlogicisp : 1040B or later chip," + " firmware not (re)loaded\n"); else { int i; diff -urP old/include/asm-alpha/pci.h new/include/asm-alpha/pci.h --- old/include/asm-alpha/pci.h Sun Aug 9 15:09:06 1998 +++ new/include/asm-alpha/pci.h Thu Nov 19 21:58:31 1998 @@ -32,7 +32,7 @@ #if defined(CONFIG_ALPHA_GENERIC) \ || defined(CONFIG_ALPHA_MCPCIA) \ - /* || defined(CONFIG_ALPHA_TSUNAMI) */ + || defined(CONFIG_ALPHA_TSUNAMI) #define PCI_HANDLE(bus) ((bus2hose[bus]->pci_hose_index & 3UL) << 32) #define DEV_IS_ON_PRIMARY(dev) \ ----------------------------------------------------------------------------- -- To unsubscribe: mail -s unsubscribe axp-kernel-list-request@redhat.com < /dev/null